Build Targets
Builds for both general ESP8266 and ESP32 boards are built automatically by GitHub on Release.
The latest release can always be found here.
Builds for a number of target counters are available.
Pulse
The pulse target is the most widely compatible build, and works with all Pulse-type Geiger counters. You’ll find a list of compatible and tested pulse counters in the hardware section.
| Target Name | Target Counter | Notes |
|---|---|---|
pulse | Pulse | ESP32 builds default to using built in hardware PCNT counter |
pulse_no_pcnt | Pulse | ESP32-only build disabling PCNT |
ESP32 / ESP32-S3 / ESP32-C3 builds bundle SSD1306 OLED support; the panel is auto-detected at boot. No separate oled_* envs needed on the ESP32 family. ESP8266 still ships dedicated oled_* envs to avoid the runtime cost on the slower core.
Serial
A single unified serial build supports all serial Geiger counter types. The serial protocol is selected at runtime via the Config page (System > Serial Type).
| Target Name | Notes |
|---|---|
serial | Unified serial build. Supports GC10, GC10Next, MightyOhm and ESPGeiger protocols. Select your counter type from the Config page after flashing. |
Supported serial types:
| Type ID | Counter | Baud Rate | Serial Format |
|---|---|---|---|
| 1 | GC10 | 9600 | 60\n (plain integer) |
| 2 | GC10Next | 115200 | 60\n (plain integer) |
| 3 | MightyOhm | 9600 | CPS, 1, CPM, 60, uSv/hr, 1.23, INST\n |
| 4 | ESPGeiger | 115200 | CPM: 60\n |
Hardware Specific Builds
A number of hardware specific builds are also made to support ESPGeiger-HW and ESPGeiger Log devices.
| Target Name | Target Counter | Counter Type | Notes |
|---|---|---|---|
espgeigerhw | ESPGeiger-HW | Pulse | Build for the ESPGeiger-HW Geiger Counter. Controls PWM for HV along with other specifics for hardware. |
espgeigerlog | ESPGeiger Log | Pulse | A pulse based build for the ESPGeiger Log hardware with NeoPixel and SDCard output. |
espgeigerlog_serial | ESPGeiger Log | Serial | A serial based build for the ESPGeiger Log hardware. Select your counter type from the Config page. |
espgeigerlog_udp | ESPGeiger Log | UDP receiver | A UDP-receiver build for the ESPGeiger Log hardware. Logs clicks from any ESPGeiger device broadcasting UdpBlip on the LAN; useful as a headless aggregator that records to SD card. |
HV Builds
Generic HV builds enable the same closed-loop high-voltage management used on ESPGeiger-HW, but on stock ESP8266 / ESP32 boards. You wire up your own boost converter (transistor + inductor + voltage divider) and configure the PWM pin at runtime via the Config page. See High Voltage Configuration for wiring and tuning.
| Target Name | Platform | Notes |
|---|---|---|
esp8266_hv | ESP8266 | Pulse build with HV generator + ADC feedback. PWM frequency up to 40 kHz; PWM pin defaults to -1 (disabled) until set in the Config page. |
esp8266oled_hv | ESP8266 + OLED | As esp8266_hv with SSD1306 OLED. |
esp32_hv | ESP32 | Pulse build with HV generator + ADC feedback. PWM frequency up to 80 kHz (hardware LEDC). VFB pin defaults to GPIO 36 (ADC1, no WiFi conflict). SSD1306 OLED auto-detected at boot. |
For safety the PWM pin defaults to -1 so freshly flashed firmware does not drive any pin until you’ve explicitly chosen one. After setting the pin in /egprefs, reboot for the change to take effect.
Audio Tick (ESP32 only)
Builds with the Audio Tick output enabled. A per-pulse click is played through an I2S amplifier (e.g. MAX98357A). The XH-S3E set targets the MINI ESP32-S3-N16R8 (sold as “XH-S3E-AI”, a small purple ESP32-S3 board with onboard speaker, mic, button, NeoPixel and OLED); the esp32_audio_* set targets a generic ESP32 board with an externally wired amplifier (BCLK / WS / DOUT configurable from the Config > tick page).
| Target Name | Hardware | Counter Type | Notes |
|---|---|---|---|
xh_s3e_pulse | MINI ESP32-S3-N16R8 (XH-S3E-AI) | Pulse | Pulse input on GPIO 13. Pin map fixed. |
xh_s3e_serial | MINI ESP32-S3-N16R8 (XH-S3E-AI) | Serial | Serial input on GPIO 13/14. |
xh_s3e_udp | MINI ESP32-S3-N16R8 (XH-S3E-AI) | UDP receiver | Tubeless receiver, see UDP Receiver below. |
xh_s3e_test | MINI ESP32-S3-N16R8 (XH-S3E-AI) | n/a | Poisson simulator for tuning the click sound. |
esp32_audio_pulse | ESP32 + amp | Pulse | PCNT-based pulse input. |
esp32_audio_pulse_no_pcnt | ESP32 + amp | Pulse | Interrupt-based pulse input (use when PCNT can’t latch the pulse). |
esp32_audio_serial | ESP32 + amp | Serial | |
esp32_audio_test | ESP32 + amp | n/a | Poisson simulator. |
esp32s3_audio_pulse | ESP32-S3 dev kit + amp | Pulse | Generic S3 board, externally wired I2S amplifier. |
esp32s3_audio_serial | ESP32-S3 dev kit + amp | Serial |
Audio Tick is disabled by default (tick.enable=0). Enable it from the Config page after flashing and, on the esp32_audio_* envs, set the three I2S pins to match your wiring before rebooting.
UDP Receiver
UDP receiver builds turn an ESP into a tubeless “mirror” device that listens for Local Broadcast traffic from another ESPGeiger and behaves as if a real Geiger tube were attached. CPM/µSv/history/blip-LED/MQTT/WebAPI/OLED all derive from the received clicks. See UDP / OSC Output for the full protocol and configuration.
| Target Name | Platform | Display | Notes |
|---|---|---|---|
esp8266_udp | ESP8266 | none | Headless receiver. |
esp8266oled_udp | ESP8266 | OLED | Receiver with display; shows producer chipid + loss% on page 2 and a feed-alive indicator on page 1. |
esp32_udp | ESP32 | auto | ESP32 receiver. SSD1306 OLED auto-detected at boot; more heap headroom than ESP8266, cleaner choice for fleet aggregator (sum mode). |
esp32c3_udp | ESP32-C3 | auto | ESP32-C3 receiver with bundled OLED. |
esp32s3_udp | ESP32-S3 | auto | ESP32-S3 receiver with bundled OLED. |
After flashing, configure the source mode (pin / sum / auto) and group/port from the Config → Input page.
Test
Test builds can be used to emulate a Geiger counter with your board. You can connect the ESPGeiger RXPIN and TXPIN together, or connect one ESPGeiger TXPIN to the RXPIN on another ESPGeiger.
Note: No values are submitted to public services with Test builds.
By default the Test output cycles through several ranges of reading, switching each 5 minute period:
- 0.5 CPS / 30 CPM
- 1 CPS / 60 CPM
- 1.66 CPS / 100 CPM
- 2 CPS / 120 CPM
| Target Name | Target Counter | Notes |
|---|---|---|
test | n/a | Internal interrupt based counter. No output, mostly for testing the Counter.h functionality. |
testpulse | Pulse | Test build which outputs a Poisson distributed pulse on the TXPIN |
testpulsepwm | Pulse | Test build which outputs a interrupt generated pulse on the TXPIN |
testserial | Serial | Test build which outputs emulated serial data on the TXPIN. Serial format selectable at runtime via Config page. |
Test Build Options
Hardware Specific Test Builds
| Target Name | Target Counter | Counter Type | Notes |
|---|---|---|---|
espgeigerlog_test | ESPGeiger Log | n/a | A test build for the ESPGeiger Log hardware. Internal interrupt based counter. No output, mostly for testing the ESPGeiger Log functionality. |
espgeigerlog_testpulse | ESPGeiger Log | Pulse | A test build for the ESPGeiger Log hardware. Test build which outputs a pulse on the PLS pin. |